src/hotspot/cpu/x86/vm_version_x86.cpp

*** 1163,1173 ****
      if (FLAG_IS_DEFAULT(AllocatePrefetchInstr) && supports_3dnow_prefetch()) {
        FLAG_SET_DEFAULT(AllocatePrefetchInstr, 3);
      }
    }
  
!   if( is_amd() ) { // AMD cpus specific settings
      if( supports_sse2() && FLAG_IS_DEFAULT(UseAddressNop) ) {
        // Use it on new AMD cpus starting from Opteron.
        UseAddressNop = true;
      }
      if( supports_sse2() && FLAG_IS_DEFAULT(UseNewLongLShift) ) {
--- 1163,1173 ----
      if (FLAG_IS_DEFAULT(AllocatePrefetchInstr) && supports_3dnow_prefetch()) {
        FLAG_SET_DEFAULT(AllocatePrefetchInstr, 3);
      }
    }
  
!   if( is_amd() || is_hygon() ) { // AMD cpus specific settings
      if( supports_sse2() && FLAG_IS_DEFAULT(UseAddressNop) ) {
        // Use it on new AMD cpus starting from Opteron.
        UseAddressNop = true;
      }
      if( supports_sse2() && FLAG_IS_DEFAULT(UseNewLongLShift) ) {
*** 1237,1248 ****
        // Limit vectors size to 16 bytes on AMD cpus < 17h.
        FLAG_SET_DEFAULT(MaxVectorSize, 16);
      }
  #endif // COMPILER2
  
!     // Some defaults for AMD family 17h
!     if ( cpu_family() == 0x17 ) {
        // On family 17h processors use XMM and UnalignedLoadStores for Array Copy
        if (supports_sse2() && FLAG_IS_DEFAULT(UseXMMForArrayCopy)) {
          FLAG_SET_DEFAULT(UseXMMForArrayCopy, true);
        }
        if (supports_sse2() && FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {
--- 1237,1248 ----
        // Limit vectors size to 16 bytes on AMD cpus < 17h.
        FLAG_SET_DEFAULT(MaxVectorSize, 16);
      }
  #endif // COMPILER2
  
!     // Some defaults for AMD family 17h || Hygon family 18h
!     if ( cpu_family() == 0x17 || cpu_family() == 0x18 ) {
        // On family 17h processors use XMM and UnalignedLoadStores for Array Copy
        if (supports_sse2() && FLAG_IS_DEFAULT(UseXMMForArrayCopy)) {
          FLAG_SET_DEFAULT(UseXMMForArrayCopy, true);
        }
        if (supports_sse2() && FLAG_IS_DEFAULT(UseUnalignedLoadStores)) {